Customer Notification VR4133TM 64-bit Microprocessor Operating Precautions µPD30133F3-266-GA3-A Document No. TPS-HE-B-6009-4 Date Publish
Operating Precautions for VR4133 TM (C) Valid Specification Item Date published Document No. Document Title 1 April 2004 U16551EJ2V0DS00 VR4133 Pre
Operating Precautions for VR4133 TM Customer Notification 11 (D) Revision History Item Date published Document No. Comment 1 October 2003 TPS-
DISCLAIMER The related documents in this customer notification may include preliminary versions. However, preliminary versions may not have been marke
Table of Contents (A) Table of Operating Precautions ... 4
Operating Precautions for VR4133 TM (A) Table of Operating Precautions µPD30133 Rev. 1.1 1.2 1.3 1.4 1.5 No. Outline Rank Note I,K E P X L 1 Simulta
Operating Precautions for VR4133 TM (B) Description of Operating Precautions No. 1 Simultaneous locking of cache lines with the same index (Specific
Operating Precautions for VR4133 TM No. 5 Write access to external I/O area (Direction of usage) Details A write cycle to external I/O or Flash area
Operating Precautions for VR4133 TM No. 7 Disconnect at the end of PCI burst cycle (Specification change notice) Details The last transfer of a PCI
Operating Precautions for VR4133 TM No. 9 Ethernet: excessive data transfer into memory (Direction of usage) Details If two or more packets are rec
Operating Precautions for VR4133 TM No. 11 Usage PCI and Ether/CEU/BCU/CSI (using DMA mode) simultaneously (Direction of usage) Details Using PCI a
Kommentare zu diesen Handbüchern